Metal-insulator-semiconductor structures on p-type GaAs with low interface state density

Interfacial properties of in situ deposited Si3N4 /Si/p-GaAs metal-insulator-semiconductor structures have been investigated. Conductance loss measurements show that a minimum interface trap density as low as 5.5310 cm eV has been achieved on p-type GaAs by using a high quality strained Si interlayer. The quasistatic and high-frequency capacitance-voltage measurements as well as the theoretical high-frequency capacitance-voltage calculation clearly demonstrate the accumulation, depletion, and inversion regions. The interface trap density as a function of the band-gap energy near the midgap has been determined with the conductance method. The reduced band bending ~0.84 V! may be mainly caused by the narrower band gap of the strained Si interlayer. © 1996 American Institute of Physics. @S0003-6951~96!04828-0#